EE536a - Mixed Signal Integrated Circuit Design

EE536a is principally an advanced circuits and systems analysis course that comprises the foundation for the more design-intensive analog and mixed signal integrated circuits and systems classes offered in the Graduate Division of the Ming Hsieh Department of Electrical Engineering. It teaches students computationally efficient manual and computer-aided methods for analyzing the electrical dynamics of both linear and nonlinear models of active networks destined for monolithic realization principally in complementary metal-oxide-semiconductor (CMOS) transistor technologies. More than teaching mere analytical problem solving techniques, the course couches analyses in forms that foster the engineering insights that underpin a meaningful characterization and performance assessment of active circuits embedded in high frequency and/or high speed system applications. These insights are fundamental to consistently creative circuit and system design, for they enable realistic comparisons among candidate active devices and among plausible circuit architectures. They are also indispensable to the omnipresent design problem of mitigating the deleterious effects that parasitic energy storage and other high order device and circuit phenomena have on such performance metrics as bandwidth, signal delay in both time and frequency domains, gain and phase margins, phase noise, distortion, and transient step and impulse responses. In short, the formulation of insightful design-oriented analysis strategies commensurate with the realization of modern integrated circuits, and particularly analog high performance integrated circuits and systems, is the focus of EE536a.

EE536a Coursework Materials

  • Spring 2013 Assignments
 Syllabus 
Homework 1-2  Homework Solutions 1-2 
Homework 3  Homework Solutions 3 
Homework 4  Homework Solutions 4 
Homework 5  Homework Solutions 5 
Homework 6-7  Homework Solutions 6-7 
Homework 8  Homework Solutions 8 
   
Examination (Midterm) Exam Solution (Midterm)
Examination (Final) Exam Solution (Final)
   
Design Projects    Due Before May 3rd  

 

 

A look at the Historical Record

  • From Fall 2012
 Syllabus 
Homework 1  Homework Solutions 1 
Homework 2  Homework Solutions 2 
Homework 3  Homework Solutions 3 
Homework 4  Homework Solutions 4 
Homework 5  Homework Solutions 5 
Homework 6-7  Homework Solutions 6-7 
   
Examination (Midterm) Exam Solution (Midterm)
Examination (Final) Exam Solution (Final)
   
Design Projects     Due Before  Dec. 12th 

 

    • From Spring 2012
     Syllabus 
    Homework 1  Homework Solutions 1 
    Homework 2  Homework Solutions 2 
    Homework 3  Homework Solutions 3 
    Homework 4  Homework Solutions 4 
    Homework 5  Homework Solutions 5 
    Homework 6-7  Homework Solutions 6-7 
    Homework 8  Homework Solutions 8 
    Homework 9  Homework Solutions 9 
       
    Examination (Midterm) Exam Solution (Midterm)
    Examination (Final) Exam Solution (Final)
       
    Design Projects    Due Before  May 2nd 

     

    • From Fall 2011
     Syllabus 
    Homework 1  Homework Solutions 1 
    Homework 2  Homework Solutions 2 
    Homework 3  Homework Solutions 3 
    Homework 4  Homework Solutions 4 
    Homework 5  Homework Solutions 5 
    Homework 6-7  Homework Solutions 6-7 
    Homework 8  Homework Solutions 8 
       
    Examination (Midterm) Exam Solution (Midterm)
    Examination (Final) Exam Solution (Final)
       
    Design Projects    Due Before  Dec. 5th 

     

    • From Spring 2011
     Syllabus 
    Homework 1-2 Homework Solution 1-2
    Homework 3 Homework Solution 3
    Homework 4-5 Homework Solution 4-5
    Homework 6 Homework Solution 6
    Homework 7-8 Homework Solutions 7-8
    Homework 9 Homework Solutions 9
    Homework 10 Homework Solutions 10
       
    Examination (Midterm) Exam Solution (Midterm)
    Examination (Final) Exam Solution (Final)

     

    • From Fall 2010
     Syllabus 
      Homework 1 & 2   Homework Solutions 1 & 2
      Homework 3 & 4   Homework Solutions 3 & 4
      Homework 5   Homework Solutions 5
      Homework 6   Homework Solutions 6
      Homework 7 & 8   Homework Solutions 7 & 8
      Homework 9   Homework Solutions 9
       
    Examination (Midterm) Exam Solution (Midterm)
    Examination (Final) Exam Solution (Final)

     

    Office Hours

    Monday:
       12:PM to 1:30PM in PHE 620
    Tuesday:
       1:PM to 2:30PM in PHE 620
    Otherwise: By Appointment
       Contact Instructor Via E-mail
    E-mail: johnc@usc.edu

    Contact

    Address: University of Southern California
       Ming Hsieh Department of Electrical Engineering
       USC Viterbi School of Engineering
       University Park, Mail Code: 0271
       Los Angeles, California 90089-0271
    Phone: (213) 740-4692

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